Unlike its predecessor, eMMC (which uses a parallel interface), UFS uses a similar to PCIe or SATA. A typical UFS 3.1 chip comes in a BGA-153 package (Ball Grid Array, 153 balls), though not all balls are used. The essential pins fall into four functional groups:

To maintain high efficiency, UFS 3.1 utilizes multiple voltage rails: Main power supply for the NAND flash memory. Power supply for the controller and I/O interface.

UFS 3.1 supports up to two lanes. Lane 0 is mandatory; Lane 1 is optional but required for maximum performance.

For data recovery or forensic chip-off/ISP work, five primary wires are usually required to establish communication with tools like EasyJtag or UFI: Data transmission pairs. RXP / RXN: Data reception pairs. GND: Ground connection.